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Many digital systems must process signals from outside with sensors and level translators. The signals are mostly pulse trains or bursts of pulses. Some pulses may be too narrow, some may be too wide, and other pulse trains may be affected by glitches. Designers need to learn about capturing pulses, detecting edges, filtering out or detecting glitches, and synchronizing the pulses with internal clocks. In the first part of this three-part article in Circuit Cellar Issue #413, we introduced the latches and flip-flops as the most basic components to address these fundamental design problems.
In Issue #414, I examined how to implement the flip-flop behavior like enabling and resetting, timing parameters, and synchronization. In Part 3, I will look further into the problem of metastability and related subtleties of setting or resetting.
These are minor but intricate problems that most textbooks do not adequately cover. Solving such complex problems requires some familiarity with the appropriate components and careful attention to the minute details involved in the process.
METASTABILITY IN PRACTICE
この記事は Circuit Cellar の February 2025 版に掲載されています。
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この記事は Circuit Cellar の February 2025 版に掲載されています。
7 日間の Magzter GOLD 無料トライアルを開始して、何千もの厳選されたプレミアム ストーリー、9,000 以上の雑誌や新聞にアクセスしてください。
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